ADCH & ADCL
ADCH and ADCL are Data registers used to store the Digital result, converted from Analog. Since Atmega8 has 10 bits resolution, result may vary from 0 to 1023 (1024 in count) so that it can not be stored in a single 8 bit register, two registers are used ADCH & ADCL (ADC register High and Low) because Atmega8 have 8 bit architecture. By default, the result is presented right adjusted, but can optionally be presented left adjusted by setting the ADLAR bit in ADMUX
If the result is left adjusted and no more than 8-bit precision is required, it is sufficient to read AD CH. Otherwise, ADCL must be read first, then ADCH.
The ADC has its own interrupt which can be triggered when a conversion completes. When ADC access to the Data Registers is prohibited between reading of ADCH and ADCL, the interrupt will trigger even if the result is lost.
In the next page we will write some programs
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